[PATCH v2 2/5] arm64: dts: rockchip: fix pinmux of UART5 for PX30 Ringneck on Haikou

From: Quentin Schulz
Date: Fri Feb 21 2025 - 09:05:20 EST


From: Quentin Schulz <quentin.schulz@xxxxxxxxx>

UART5 uses GPIO0_B5 as UART RTS but muxed in its GPIO function,
therefore UART5 must request this pin to be muxed in that function, so
let's do that.

Fixes: 5963d97aa780 ("arm64: dts: rockchip: add rs485 support on uart5 of px30-ringneck-haikou")
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Quentin Schulz <quentin.schulz@xxxxxxxxx>
---
arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
index 2321536c553fed20bc02d91f40a5d5a6dc20892c..e9ebac0f4984a26ec288083f74c7e193cdbec326 100644
--- a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
+++ b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
@@ -194,6 +194,13 @@ sd_card_led_pin: sd-card-led-pin {
<3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ uart {
+ uart5_rts_pin: uart5-rts-pin {
+ rockchip,pins =
+ <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};

&pwm0 {
@@ -227,7 +234,7 @@ &uart0 {
};

&uart5 {
- pinctrl-0 = <&uart5_xfer>;
+ pinctrl-0 = <&uart5_xfer &uart5_rts_pin>;
rts-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>;
status = "okay";
};

--
2.48.1