Re: [PATCH net-next 2/2] net: mdio: mdio-i2c: Add support for single-byte SMBus operations

From: Maxime Chevallier
Date: Mon Feb 24 2025 - 05:09:08 EST


On Mon, 24 Feb 2025 04:36:49 +0100
Andrew Lunn <andrew@xxxxxxx> wrote:

> > This was only tested on Copper SFP modules that embed a Marvell 88e1111
> > PHY.
>
> Does the Marvell PHY datasheet say what happens when you perform 8 bit
> accesses to 16 bit registers, such at the BMSR?

It doesn't specifically say what happens to BMSR, however the section
about "how to perform a random read" gives an example of a random
register read that is made of 2 single-byte reads, including the STOP
bit being set in-between reading the upper byte and the lower byte.

While this doesn't exactly specify the BMSR's latching behaviour, it
looks to me that this is a coherent way of reading a register state,
and BMSR's link status register *should* latch until the lower byte is
read.

I'll try it out with one of my modules to make sure though.

Maxime