Re: [RFC PATCH 0/2] Eliminate the no-SIMD en/decryption fallbacks on x86

[Eric Biggers]

On Wed, Feb 19, 2025 at 09:13:23PM -0800, Eric Biggers wrote:
> The patchset can also be retrieved from:
>  
>     git fetch https://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux.git x86-softirq-fpu-fix-v1
> 
> This patchset fixes a longstanding issue where kernel-mode FPU (i.e.,
> SIMD) was not reliably usable in softirqs in x86, which was creating the
> need for a fallback.  The fallback was really bad for performance, and
> it even hurt performance for users that never encountered the edge case
> where kernel-mode FPU was not usable.
> 
> This patchset aligns x86 with other architectures such as arm, arm64,
> and riscv by making kernel-mode FPU work in softirqs reliably.  There
> are a few possible ways to achieve that, and for now I just went with
> the simplest way; see patch 1 for details.
> 
> Patch 2 eliminates all uses of the "crypto SIMD helper" from x86, as
> patch 1 makes it unnecessary.  For the RFC it is just one big patch;
> I'll probably split patch 2 up if this progresses past RFC status.
> 
> Performance results have been positive.  All en/decryption is now
> slightly faster on x86, as it no longer take a detour through
> crypto/simd.c.  I get a 7% or 23% improvement for AES-XTS, for example.
> 
> I also benchmarked bidirectional IPsec, which has been claimed to often
> hit the edge case where kernel-mode FPU was previously not usable in
> softirq context.  Ultimately, I was not actually able to reproduce that
> edge case being reached unless I reduced the number of CPUs to 1, in
> which case it then started being occasionally reached.  Regardless, even
> without that case being reached, IPsec throughput still improved by 2%.
> In situations where that case was being reached, or where users required
> a synchronous algorithm, a much larger improvement should be seen.
> 
> Eric Biggers (2):
>   x86/fpu: make kernel-mode FPU reliably usable in softirqs
>   crypto: x86 - stop using the SIMD helper

Any thoughts on this from the x86 folks?

- Eric