Re: [Patch v2 15/24] perf/x86/intel: Add SSP register support for arch-PEBS

[Peter Zijlstra]

On Tue, Feb 18, 2025 at 03:28:09PM +0000, Dapeng Mi wrote:

> +	if (unlikely(event->attr.sample_regs_intr & BIT_ULL(PERF_REG_X86_SSP))) {
> +		/* Only arch-PEBS supports to capture SSP register. */
> +		if (!x86_pmu.arch_pebs || !event->attr.precise_ip)
> +			return -EINVAL;
> +	}

> @@ -27,9 +27,11 @@ enum perf_event_x86_regs {
>  	PERF_REG_X86_R13,
>  	PERF_REG_X86_R14,
>  	PERF_REG_X86_R15,
> +	/* Shadow stack pointer (SSP) present on Clearwater Forest and newer models. */
> +	PERF_REG_X86_SSP,

The first comment makes more sense. Nobody knows of cares what a
clearwater forest is, but ARCH-PEBS is something you can check.

Also, this hard implies that anything exposing ARCH-PEBS exposes
CET-SS. Does virt complicate this?