Re: [Patch v2 15/24] perf/x86/intel: Add SSP register support for arch-PEBS

[Andi Kleen]

On Tue, Feb 25, 2025 at 12:54:50PM +0100, Peter Zijlstra wrote:
> On Tue, Feb 18, 2025 at 03:28:09PM +0000, Dapeng Mi wrote:
> 
> > @@ -651,6 +651,16 @@ int x86_pmu_hw_config(struct perf_event *event)
> >  			return -EINVAL;
> >  	}
> >  
> > +	/* sample_regs_user never support SSP register. */
> > +	if (unlikely(event->attr.sample_regs_user & BIT_ULL(PERF_REG_X86_SSP)))
> > +		return -EINVAL;
> 
> We can easily enough read user SSP, no?

Not for multi record PEBS.

Also technically it may not be precise.

-andi