Il 17/02/25 16:03, Alexandre Mergnat ha scritto:
Hi CK.
On 17/02/2025 08:56, CK Hu (胡俊光) wrote:
On Fri, 2025-01-10 at 14:31 +0100, Alexandre Mergnat wrote:
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Currently, mtk_dsi_lane_ready (which setup the DSI lane) is triggered
before mtk_dsi_poweron. lanes_ready flag toggle to true during
mtk_dsi_lane_ready function, and the DSI module is set up during
mtk_dsi_poweron.
Later, during panel driver init, mtk_dsi_lane_ready is triggered but does
nothing because lanes are considered ready. Unfortunately, when the panel
driver try to communicate, the DSI returns a timeout.
The solution found here is to put lanes_ready flag to false after the DSI
module setup into mtk_dsi_poweron to init the DSI lanes after the power /
setup of the DSI module.
I'm not clear about what happen.
I think this DSI flow has worked for a long time.
So only some panel has problem?
I don't know if it's related to a specific panel or not.
And another question.
Do you mean mtk_dsi_lane_ready() do some setting to hardware, but lane is not actually ready?
The workflow should be:
... | dsi->lanes_ready = false | Power-on | setup dsi lanes | dsi->lanes_ready = true (to avoid re-do dsi lanes setup) | ...
I observe (print function name called + dsi->lanes_ready value):
Alex, the first poweron is called by mtk_dsi_ddp_start() - and the start callback
is internal to the mediatek-drm driver.
That callback is called by mtk_crtc during setup and during bridge enable(), and
there we go with suboptimal code design backfiring - instead of using what the
DRM APIs provide, this driver uses something custom *and* the DRM APIs, giving
this issue.
Part of what mtk_crtc does is duplicated with what the DRM APIs want to do, so
there you go, that's your problem here :-)
Should I go on with describing the next step(s), or is that obvious for everyone?
:-)
Cheers,