Re: [PATCH v9 1/9] preempt: Introduce HARDIRQ_DISABLE_BITS

[Peter Zijlstra]

On Thu, Feb 27, 2025 at 05:10:12PM -0500, Lyude Paul wrote:

> @@ -26,29 +27,34 @@
>   *
>   *         PREEMPT_MASK:	0x000000ff
>   *         SOFTIRQ_MASK:	0x0000ff00
> - *         HARDIRQ_MASK:	0x000f0000
> - *             NMI_MASK:	0x00f00000
> + * HARDIRQ_DISABLE_MASK:	0x00ff0000
> + *         HARDIRQ_MASK:	0x07000000
> + *             NMI_MASK:	0x38000000
>   * PREEMPT_NEED_RESCHED:	0x80000000
>   */
>  #define PREEMPT_BITS	8
>  #define SOFTIRQ_BITS	8
> -#define HARDIRQ_BITS	4
> -#define NMI_BITS	4
> +#define HARDIRQ_DISABLE_BITS	8
> +#define HARDIRQ_BITS	3
> +#define NMI_BITS	3

I'm a bit scared here. This reduces the number of NMI levels from 16 to
8, and we have 5 IST gates that can nest in wonderful ways. This might
just be achievable.

Also, you should probably double check the HARDIRQ bits against all
architectures that have interrupt priority support -- Linux doesn't
really do that, local_irq_disable() is typically disable-all, but things
like PowerPC play funny games -- ideally those games are all played
before entering the common code that has the accounting on.

And I don't think we have overflow detection on the NMI/IRQ bits.

The comment with __nmi_enter() is now wrong.


Anyway, like I said before, I like the general idea, but I hate we're
growing a 3rd form.