Re: [PATCH v2] spi: microchip-core: prevent RX overflows when transmit size > FIFO size
From: Andy Shevchenko
Date: Tue Mar 04 2025 - 10:47:10 EST
On Mon, Mar 03, 2025 at 10:47:40AM +0000, Conor Dooley wrote:
> When the size of a transfer exceeds the size of the FIFO (32 bytes), RX
> overflows will be generated and receive data will be corrupted and
> warnings will be produced. For example, here's an error generated by a
> transfer of 36 bytes:
>
> spi_master spi0: mchp_corespi_interrupt: RX OVERFLOW: rxlen: 4, txlen: 0
>
> The driver is currently split between handling receiving in the
> interrupt handler, and sending outside of it. Move all handling out of
> the interrupt handling, and explicitly link the number of bytes read of
> of the RX FIFO to the number written into the TX one. This both resolves
> the overflow problems as well as simplifying the flow of the driver.
...
> +static inline void mchp_corespi_read_fifo(struct mchp_corespi *spi, int fifo_max)
> {
> + for (int i = 0; i < fifo_max; i++) {
> + u32 data;
> + while (mchp_corespi_read(spi, REG_STATUS) & STATUS_RXFIFO_EMPTY)
> + ;
What may go wrong with this code? :-)
I think limiting the infinite loop by a timeout is a good thing to have.
> + data = mchp_corespi_read(spi, REG_RX_DATA);
>
> spi->rx_len -= spi->n_bytes;
>
> mchp_corespi_write(spi, REG_FRAMESUP, len);
> }
--
With Best Regards,
Andy Shevchenko