[tip: x86/cleanups] x86/delay: Fix inconsistent whitespace

[tip-bot2 for Charles Han]

The following commit has been merged into the x86/cleanups branch of tip:

Commit-ID:     f739365158a33549cf1827968b12a370ab75589e
Gitweb:        https://git.kernel.org/tip/f739365158a33549cf1827968b12a370ab75589e
Author:        Charles Han <hanchunchao@xxxxxxxxxx>
AuthorDate:    Wed, 05 Mar 2025 14:35:14 +08:00
Committer:     Ingo Molnar <mingo@xxxxxxxxxx>
CommitterDate: Wed, 05 Mar 2025 09:51:04 +01:00

x86/delay: Fix inconsistent whitespace

Smatch warns about this whitespace damage:

	arch/x86/lib/delay.c:134 delay_halt_mwaitx() warn: inconsistent indenting

Signed-off-by: Charles Han <hanchunchao@xxxxxxxxxx>
Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20250305063515.3951-1-hanchunchao@xxxxxxxxxx
---
 arch/x86/lib/delay.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/lib/delay.c b/arch/x86/lib/delay.c
index 23f81ca..e86eda2 100644
--- a/arch/x86/lib/delay.c
+++ b/arch/x86/lib/delay.c
@@ -131,7 +131,7 @@ static void delay_halt_mwaitx(u64 unused, u64 cycles)
 	 * Use cpu_tss_rw as a cacheline-aligned, seldom accessed per-cpu
 	 * variable as the monitor target.
 	 */
-	 __monitorx(raw_cpu_ptr(&cpu_tss_rw), 0, 0);
+	__monitorx(raw_cpu_ptr(&cpu_tss_rw), 0, 0);
 
 	/*
 	 * AMD, like Intel, supports the EAX hint and EAX=0xf means, do not