[PATCH RFC NOT TESTED] PCI: intel-gw: Use use_parent_dt_ranges and clean up intel_pcie_cpu_addr_fixup()

[Frank Li]

Remove intel_pcie_cpu_addr_fixup() as the DT bus fabric should provide correct
address translation. Set use_parent_dt_ranges to allow the DWC core driver to
fetch address translation from the device tree.

Signed-off-by: Frank Li <Frank.Li@xxxxxxx>
---
This patches basic on
https://lore.kernel.org/imx/20250128-pci_fixup_addr-v9-0-3c4bb506f665@xxxxxxx/

I have not hardware to test and there are not intel,lgm-pcie in kernel
tree.

Your dts should correct reflect hardware behavor, ref:
https://lore.kernel.org/linux-pci/Z8huvkENIBxyPKJv@xxxxxxxx/T/#mb7ae78c3a22324b37567d24ecc1c810c1b3f55c5

According to your intel_pcie_cpu_addr_fixup()

Basically, config space/io/mem space need minus SZ_256. parent bus range
convert it to original value.

Look for driver owner, who help test this and start move forward to remove
cpu_addr_fixup() work.
---
Frank Li <Frank.Li@xxxxxxx>
---
 drivers/pci/controller/dwc/pcie-intel-gw.c | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-intel-gw.c b/drivers/pci/controller/dwc/pcie-intel-gw.c
index 9b53b8f6f268e..c21906eced618 100644
--- a/drivers/pci/controller/dwc/pcie-intel-gw.c
+++ b/drivers/pci/controller/dwc/pcie-intel-gw.c
@@ -57,7 +57,6 @@
 	PCIE_APP_IRN_INTA | PCIE_APP_IRN_INTB | \
 	PCIE_APP_IRN_INTC | PCIE_APP_IRN_INTD)
 
-#define BUS_IATU_OFFSET			SZ_256M
 #define RESET_INTERVAL_MS		100
 
 struct intel_pcie {
@@ -381,13 +380,7 @@ static int intel_pcie_rc_init(struct dw_pcie_rp *pp)
 	return intel_pcie_host_setup(pcie);
 }
 
-static u64 intel_pcie_cpu_addr(struct dw_pcie *pcie, u64 cpu_addr)
-{
-	return cpu_addr + BUS_IATU_OFFSET;
-}
-
 static const struct dw_pcie_ops intel_pcie_ops = {
-	.cpu_addr_fixup = intel_pcie_cpu_addr,
 };
 
 static const struct dw_pcie_host_ops intel_pcie_dw_ops = {
@@ -409,6 +402,7 @@ static int intel_pcie_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, pcie);
 	pci = &pcie->pci;
 	pci->dev = dev;
+	pci->use_parent_dt_ranges = true;
 	pp = &pci->pp;
 
 	ret = intel_pcie_get_resources(pdev);

---
base-commit: 1552be4855dacca5ea39b15b1ef0b96c91dbea0d
change-id: 20250305-intel-7c25bfb498b1

Best regards,