[PATCH v2 2/2] LoongArch: KVM: Add interrupt checking with Loongson AVEC

[Bibo Mao]

There is newly added macro INT_AVEC with CSR ESTAT register, which is
bit 14 used for Loongson AVEC support. AVEC interrupt status bit 14 is
supported with macro CSR_ESTAT_IS, here replace hardcoded value 0x1fff
with macro CSR_ESTAT_IS so that AVEC interrupt status is supported by
KVM also.

Signed-off-by: Bibo Mao <maobibo@xxxxxxxxxxx>
---
 arch/loongarch/kvm/vcpu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/loongarch/kvm/vcpu.c b/arch/loongarch/kvm/vcpu.c
index 20f941af3e9e..9e1a9b4aa4c6 100644
--- a/arch/loongarch/kvm/vcpu.c
+++ b/arch/loongarch/kvm/vcpu.c
@@ -311,7 +311,7 @@ static int kvm_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
 {
 	int ret = RESUME_GUEST;
 	unsigned long estat = vcpu->arch.host_estat;
-	u32 intr = estat & 0x1fff; /* Ignore NMI */
+	u32 intr = estat & CSR_ESTAT_IS;
 	u32 ecode = (estat & CSR_ESTAT_EXC) >> CSR_ESTAT_EXC_SHIFT;
 
 	vcpu->mode = OUTSIDE_GUEST_MODE;
-- 
2.39.3