Re: [PATCH v8 2/4] rtc: s32g: add NXP S32G2/S32G3 SoC support
From: kernel test robot
Date: Thu Mar 06 2025 - 09:48:14 EST
Hi Ciprian,
kernel test robot noticed the following build errors:
[auto build test ERROR on robh/for-next]
[also build test ERROR on arm64/for-next/core krzk-dt/for-next linus/master v6.14-rc5 next-20250306]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Ciprian-Costea/dt-bindings-rtc-add-schema-for-NXP-S32G2-S32G3-SoCs/20250228-162229
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link: https://lore.kernel.org/r/20250228081812.3115478-3-ciprianmarian.costea%40oss.nxp.com
patch subject: [PATCH v8 2/4] rtc: s32g: add NXP S32G2/S32G3 SoC support
config: hexagon-allyesconfig (https://download.01.org/0day-ci/archive/20250306/202503062204.QeQoZBYt-lkp@xxxxxxxxx/config)
compiler: clang version 18.1.8 (https://github.com/llvm/llvm-project 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250306/202503062204.QeQoZBYt-lkp@xxxxxxxxx/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@xxxxxxxxx>
| Closes: https://lore.kernel.org/oe-kbuild-all/202503062204.QeQoZBYt-lkp@xxxxxxxxx/
All errors (new ones prefixed by >>):
>> drivers/rtc/rtc-s32g.c:204:9: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
204 | rtcc = FIELD_PREP(RTCC_CLKSEL_MASK, priv->clk_src_idx);
| ^
1 error generated.
vim +/FIELD_PREP +204 drivers/rtc/rtc-s32g.c
196
197 static int rtc_clk_src_setup(struct rtc_priv *priv)
198 {
199 u32 rtcc;
200
201 if (priv->rtc_data->reserved_clk_mask & (1 << priv->clk_src_idx))
202 return -EOPNOTSUPP;
203
> 204 rtcc = FIELD_PREP(RTCC_CLKSEL_MASK, priv->clk_src_idx);
205
206 switch (priv->rtc_data->clk_div) {
207 case DIV512_32:
208 rtcc |= RTCC_DIV512EN;
209 rtcc |= RTCC_DIV32EN;
210 break;
211 case DIV512:
212 rtcc |= RTCC_DIV512EN;
213 break;
214 case DIV32:
215 rtcc |= RTCC_DIV32EN;
216 break;
217 case DIV1:
218 break;
219 default:
220 return -EINVAL;
221 }
222
223 rtcc |= RTCC_APIEN | RTCC_APIIE;
224 /*
225 * Make sure the CNTEN is 0 before we configure
226 * the clock source and dividers.
227 */
228 s32g_rtc_disable(priv);
229 writel(rtcc, priv->rtc_base + RTCC_OFFSET);
230 s32g_rtc_enable(priv);
231
232 return 0;
233 }
234
--
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki