[PATCH 2/4] PCI: dwc: Delay cfg0 setup until after discovering bridge windows
From: Bjorn Helgaas
Date: Fri Mar 07 2025 - 18:38:37 EST
From: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
devm_pci_alloc_host_bridge() reads host bridge windows and any translation
offsets. Some .cpu_addr_fixup() implementations depend on the window
offset, e.g., imx_pcie_cpu_addr_fixup() uses the offset of the first bridge
window.
---
drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index de2f2dcf5c40..b9eaba157dae 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -456,14 +456,14 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
if (ret)
return ret;
- ret = dw_pcie_cfg0_setup(pp);
- if (ret)
- return ret;
-
bridge = devm_pci_alloc_host_bridge(dev, 0);
if (!bridge)
return -ENOMEM;
+ ret = dw_pcie_cfg0_setup(pp);
+ if (ret)
+ return ret;
+
pp->bridge = bridge;
/* Get the I/O range from DT */
--
2.34.1