Re: [PATCH v4 05/14] clk: sunxi-ng: Add support for the A523/T527 CCU PLLs

From: Jernej Škrabec
Date: Sun Mar 09 2025 - 01:43:51 EST


Dne petek, 7. marec 2025 ob 01:26:19 Srednjeevropski standardni čas je Andre Przywara napisal(a):
> Add the PLL clocks of the main CCU of the Allwinner A523 and T527 SoCs.
> The clocks were modelled after the A523 and T527 manual, and double
> checked by writing all 1's into the respective register, to spot all
> implemented bits.
>
> The PLL and mod clocks for the two CPU clusters and the DSU are part of
> a separate CCU, also most audio clocks are collected in a DSP CCU, so
> both of these clock groups are missing from this driver.
>
> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>

Reviewed-by: Jernej Skrabec <jernej.skrabec@xxxxxxxxx>

Best regards,
Jernej