Re: [PATCH v4 13/14] clk: sunxi-ng: a523: add reset lines

From: Jernej Škrabec
Date: Sun Mar 09 2025 - 03:00:34 EST


Dne petek, 7. marec 2025 ob 01:26:27 Srednjeevropski standardni čas je Andre Przywara napisal(a):
> Allwinner SoCs do not contain a separate reset controller, instead the
> reset lines for the various devices are integrated into the "BGR" (Bus
> Gate / Reset) registers, for each device group: one for all UARTs, one
> for all SPI interfaces, and so on.
> The Allwinner CCU driver also doubles as a reset provider, and since the
> reset lines are indeed just single bits in those BGR register, we can
> represent them easily in an array of structs, just containing the
> register offset and the bit number.
>
> Add the location of the reset bits for all devices in the A523/T527
> SoCs, using the existing sunxi CCU infrastructure.
>
> Signed-off-by: Andre Przywara <andre.przywara@xxxxxxx>

Reviewed-by: Jernej Skrabec <jernej.skrabec@xxxxxxxxx>

Best regards,
Jernej