Re: [PATCH v3 2/2] riscv: sophgo: dts: Add spi controller for SG2042
From: Krzysztof Kozlowski
Date: Thu Mar 13 2025 - 09:44:33 EST
On 13/03/2025 14:11, Zixian Zeng wrote:
> Add spi controllers for SG2042.
>
> SG2042 uses the upstreamed Synopsys DW SPI IP.
>
> Signed-off-by: Zixian Zeng <sycamoremoon376@xxxxxxxxx>
> ---
> arch/riscv/boot/dts/sophgo/sg2042.dtsi | 26 ++++++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> index e62ac51ac55abd922b5ef796ba8c2196383850c4..9e0ec64e91a2330698aea202c8f0a2ca1f7e0919 100644
> --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi
> @@ -545,5 +545,31 @@ sd: mmc@704002b000 {
> "timer";
> status = "disabled";
> };
> +
> + spi0: spi@7040004000 {
Does not look like you keep order by unit address (see DTS coding style).
Best regards,
Krzysztof