Re: [PATCH v3 2/2] clk: sophgo: Add clock controller support for SG2044 SoC
From: Stephen Boyd
Date: Thu Mar 13 2025 - 15:38:51 EST
Quoting Inochi Amaoto (2025-03-11 18:01:54)
> On Tue, Mar 11, 2025 at 12:23:35PM -0700, Stephen Boyd wrote:
> > Quoting Inochi Amaoto (2025-02-26 15:23:19)
> > > diff --git a/drivers/clk/sophgo/clk-sg2044.c b/drivers/clk/sophgo/clk-sg2044.c
> > > new file mode 100644
> > > index 000000000000..b4c15746de77
> > > --- /dev/null
> > > @@ -0,0 +1,2271 @@
> > > +// SPDX-License-Identifier: GPL-2.0
> > > +/*
> > > + * Sophgo SG2042 clock controller Driver
[...]
> > > +};
> > > +
> > > +static struct sg2044_clk_common *sg2044_gate_commons[] = {
> >
> > Can these arrays be const?
> >
>
> It can not be, we need a non const clk_hw to register. It is
> defined in this structure. Although these array can be set as
> "struct sg2044_clk_common * const", but I think this is kind
> of meaningless.
Can't the array of pointers can be const so that it lives in RO memory?