Re: [v2] PCI: cadence: Add configuration space capability search API

From: Hans Zhang
Date: Fri Mar 14 2025 - 20:23:29 EST




On 2025/3/15 04:31, Bjorn Helgaas wrote:
On Fri, Mar 14, 2025 at 06:35:11PM +0530, Manivannan Sadhasivam wrote:
...

Even though this patch is mostly for an out of tree controller
driver which is not going to be upstreamed, the patch itself is
serving some purpose. I really like to avoid the hardcoded offsets
wherever possible. So I'm in favor of this patch.

However, these newly introduced functions are a duplicated version
of DWC functions. So we will end up with duplicated functions in
multiple places. I'd like them to be moved (both this and DWC) to
drivers/pci/pci.c if possible. The generic function
*_find_capability() can accept the controller specific readl/ readw
APIs and the controller specific private data.

I agree, it would be really nice to share this code.

It looks a little messy to deal with passing around pointers to
controller read ops, and we'll still end up with a lot of duplicated
code between __pci_find_next_cap() and __cdns_pcie_find_next_cap(),
etc.

Maybe someday we'll make a generic way to access non-PCI "config"
space like this host controller space and PCIe RCRBs.

Or if you add interfaces that accept read/write ops, maybe the
existing pci_find_capability() etc could be refactored on top of them
by passing in pci_bus_read_config_word() as the accessor.


Hi Bjorn,

I have already replied to an email, please help review whether it is appropriate.

Best regards,
Hans