Re: [PATCH 3/4] arm64: dts: qcom: sa8775p: add support for video node

From: Dmitry Baryshkov
Date: Sat Mar 15 2025 - 14:32:50 EST


On Sat, Mar 15, 2025 at 02:43:30PM +0100, Konrad Dybcio wrote:
> On 3/11/25 1:03 PM, Vikash Garodia wrote:
> > Video node enables video on Qualcomm SA8775P platform.
> >
> > Signed-off-by: Vikash Garodia <quic_vgarodia@xxxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 67 +++++++++++++++++++++++++++++++++++
> > 1 file changed, 67 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> > index 3394ae2d13003417a15e64c9e47833725ec779e6..09db8e2eb578f1cada0f4a15e3f844dc097bd46d 100644
> > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> > @@ -10,6 +10,7 @@
> > #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
> > #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
> > #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
> > +#include <dt-bindings/clock/qcom,sa8775p-videocc.h>
> > #include <dt-bindings/dma/qcom-gpi.h>
> > #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
> > #include <dt-bindings/mailbox/qcom-ipcc.h>
> > @@ -3783,6 +3784,72 @@ llcc: system-cache-controller@9200000 {
> > interrupts = <GIC_SPI 580 IRQ_TYPE_LEVEL_HIGH>;
> > };
> >
> > + iris: video-codec@aa00000 {
> > + compatible = "qcom,sa8775p-iris";
> > +
> > + reg = <0 0x0aa00000 0 0xf0000>;
> > + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> > +
> > + power-domains = <&videocc VIDEO_CC_MVS0C_GDSC>,
> > + <&videocc VIDEO_CC_MVS0_GDSC>,
> > + <&rpmhpd SA8775P_MXC>,
> > + <&rpmhpd SA8775P_MMCX>;
> > + power-domain-names = "venus",
> > + "vcodec0",
> > + "mx",
> > + "mmcx";
> > + operating-points-v2 = <&iris_opp_table>;
> > +
> > + clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
> > + <&videocc VIDEO_CC_MVS0C_CLK>,
> > + <&videocc VIDEO_CC_MVS0_CLK>;
> > + clock-names = "iface",
> > + "core",
> > + "vcodec0_core";
> > +
> > + interconnects = <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
> > + &config_noc SLAVE_VENUS_CFG QCOM_ICC_TAG_ALWAYS>,
>
> This path should use QCOM_ICC_TAG_ACTIVE_ONLY on both endpoints
>
> > + <&mmss_noc MASTER_VIDEO_P0 QCOM_ICC_TAG_ALWAYS
> > + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
> > + interconnect-names = "cpu-cfg",
> > + "video-mem";
> > +
> > + firmware-name = "qcom/vpu/vpu30_p4_s6.mbn";

Firmware-name should be a part of the board DT file rather than the SoC
DT.

>
> If it needs different firmware, I have my doubts over why 8550's data
> would be fully reused. Are you sure everything in iris_platform_sm8550.c
> applies?

If I understand correctly, the firmware is different, because the
signature profile is different. The Iris core should be compatible.

>
> > + memory-region = <&pil_video_mem>;
> > +
> > + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>;
> > + reset-names = "bus";
> > +
> > + iommus = <&apps_smmu 0x0880 0x0400>,
> > + <&apps_smmu 0x0887 0x0400>;
> > + dma-coherent;
> > +
> > + iris_opp_table: opp-table {
> > + compatible = "operating-points-v2";
> > +
> > + opp-366000000 {
> > + opp-hz = /bits/ 64 <366000000>;
> > + required-opps = <&rpmhpd_opp_svs_l1>,
> > + <&rpmhpd_opp_svs_l1>;
> > + };
>
> Please add a newline between subsequent subnodes
>
> Konrad

--
With best wishes
Dmitry