Re: [net-next PATCH v13 05/14] dt-bindings: mfd: Document support for Airoha AN8855 Switch SoC

From: Rob Herring
Date: Mon Mar 17 2025 - 10:29:19 EST


On Sat, Mar 15, 2025 at 04:43:45PM +0100, Christian Marangi wrote:
> Document support for Airoha AN8855 Switch SoC. This SoC expose various
> peripherals like an Ethernet Switch, a NVMEM provider and Ethernet PHYs.
>
> It does also support i2c and timers but those are not currently
> supported/used.
>
> Signed-off-by: Christian Marangi <ansuelsmth@xxxxxxxxx>
> ---
> .../bindings/mfd/airoha,an8855.yaml | 182 ++++++++++++++++++
> MAINTAINERS | 1 +
> 2 files changed, 183 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mfd/airoha,an8855.yaml
>
> diff --git a/Documentation/devicetree/bindings/mfd/airoha,an8855.yaml b/Documentation/devicetree/bindings/mfd/airoha,an8855.yaml
> new file mode 100644
> index 000000000000..a59a23056b3a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/airoha,an8855.yaml
> @@ -0,0 +1,182 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/airoha,an8855.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Airoha AN8855 Switch SoC
> +
> +maintainers:
> + - Christian Marangi <ansuelsmth@xxxxxxxxx>
> +
> +description: >
> + Airoha AN8855 Switch is a SoC that expose various peripherals like an
> + Ethernet Switch, a NVMEM provider and Ethernet PHYs.
> +
> + It does also support i2c and timers but those are not currently
> + supported/used.
> +
> +properties:
> + compatible:
> + const: airoha,an8855
> +
> + reg:
> + maxItems: 1
> +
> + reset-gpios: true
> +
> + efuse:
> + type: object
> + $ref: /schemas/nvmem/airoha,an8855-efuse.yaml
> + description:
> + EFUSE exposed by the Airoha AN8855 Switch. This child node definition
> + should follow the bindings specified in
> + Documentation/devicetree/bindings/nvmem/airoha,an8855-efuse.yaml

No need to list the schema twice. Drop the 2nd sentence.

> +
> + ethernet-switch:
> + type: object
> + $ref: /schemas/net/dsa/airoha,an8855-switch.yaml
> + description:
> + Switch exposed by the Airoha AN8855 Switch. This child node definition
> + should follow the bindings specified in
> + Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml

ditto

> +
> + mdio:
> + type: object
> + $ref: /schemas/net/airoha,an8855-mdio.yaml
> + description:
> + MDIO exposed by the Airoha AN8855 Switch. This child node definition
> + should follow the bindings specified in
> + Documentation/devicetree/bindings/net/airoha,an8855-mdio.yaml

ditto

> +
> +required:
> + - compatible
> + - reg

The child nodes are optional?

> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/gpio/gpio.h>
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + soc@1 {
> + compatible = "airoha,an8855";
> + reg = <1>;
> +
> + reset-gpios = <&pio 39 0>;
> +
> + efuse {
> + compatible = "airoha,an8855-efuse";
> +
> + #nvmem-cell-cells = <0>;
> +
> + nvmem-layout {
> + compatible = "fixed-layout";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + shift_sel_port0_tx_a: shift-sel-port0-tx-a@c {
> + reg = <0xc 0x4>;
> + };
> +
> + shift_sel_port0_tx_b: shift-sel-port0-tx-b@10 {
> + reg = <0x10 0x4>;
> + };
> +
> + shift_sel_port0_tx_c: shift-sel-port0-tx-c@14 {
> + reg = <0x14 0x4>;
> + };
> +
> + shift_sel_port0_tx_d: shift-sel-port0-tx-d@18 {
> + reg = <0x18 0x4>;
> + };
> +
> + shift_sel_port1_tx_a: shift-sel-port1-tx-a@1c {
> + reg = <0x1c 0x4>;
> + };
> +
> + shift_sel_port1_tx_b: shift-sel-port1-tx-b@20 {
> + reg = <0x20 0x4>;
> + };
> +
> + shift_sel_port1_tx_c: shift-sel-port1-tx-c@24 {
> + reg = <0x24 0x4>;
> + };
> +
> + shift_sel_port1_tx_d: shift-sel-port1-tx-d@28 {
> + reg = <0x28 0x4>;
> + };
> + };
> + };
> +
> + ethernet-switch {
> + compatible = "airoha,an8855-switch";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + label = "lan1";
> + phy-mode = "internal";
> + phy-handle = <&internal_phy1>;
> + };
> +
> + port@1 {
> + reg = <1>;
> + label = "lan2";
> + phy-mode = "internal";
> + phy-handle = <&internal_phy2>;
> + };
> +
> + port@5 {
> + reg = <5>;
> + label = "cpu";
> + ethernet = <&gmac0>;
> + phy-mode = "2500base-x";
> +
> + fixed-link {
> + speed = <2500>;
> + full-duplex;
> + pause;
> + };
> + };
> + };
> + };
> +
> + mdio {
> + compatible = "airoha,an8855-mdio";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + internal_phy1: phy@1 {
> + compatible = "ethernet-phy-idc0ff.0410",
> + "ethernet-phy-ieee802.3-c45";
> + reg = <1>;
> +
> + nvmem-cells = <&shift_sel_port0_tx_a>,
> + <&shift_sel_port0_tx_b>,
> + <&shift_sel_port0_tx_c>,
> + <&shift_sel_port0_tx_d>;
> + nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
> + };
> +
> + internal_phy2: phy@2 {
> + compatible = "ethernet-phy-idc0ff.0410",
> + "ethernet-phy-ieee802.3-c45";
> + reg = <2>;
> +
> + nvmem-cells = <&shift_sel_port1_tx_a>,
> + <&shift_sel_port1_tx_b>,
> + <&shift_sel_port1_tx_c>,
> + <&shift_sel_port1_tx_d>;
> + nvmem-cell-names = "tx_a", "tx_b", "tx_c", "tx_d";
> + };
> + };
> + };
> + };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 45f4bb8deb0d..65709e47adc7 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -725,6 +725,7 @@ L: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx (moderated for non-subscribers)
> L: linux-mediatek@xxxxxxxxxxxxxxxxxxx (moderated for non-subscribers)
> L: netdev@xxxxxxxxxxxxxxx
> S: Maintained
> +F: Documentation/devicetree/bindings/mfd/airoha,an8855.yaml
> F: Documentation/devicetree/bindings/net/airoha,an8855-mdio.yaml
> F: Documentation/devicetree/bindings/net/airoha,an8855-phy.yaml
> F: Documentation/devicetree/bindings/net/dsa/airoha,an8855-switch.yaml
> --
> 2.48.1
>