Re: [v3 PATCH 2/6] arm64: cpufeature: add AmpereOne to BBML2 allow list

[Yang Shi]

On 3/14/25 3:58 AM, Ryan Roberts wrote:
> On 04/03/2025 22:19, Yang Shi wrote:
> > AmpereOne supports BBML2 without conflict abort, add to the allow list.
> >
> > Signed-off-by: Yang Shi<yang@xxxxxxxxxxxxxxxxxxxxxx>
> > ---
> >   arch/arm64/kernel/cpufeature.c | 2 ++
> >   1 file changed, 2 insertions(+)
> >
> > diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
> > index 7934c6dd493e..bf3df8407ca3 100644
> > --- a/arch/arm64/kernel/cpufeature.c
> > +++ b/arch/arm64/kernel/cpufeature.c
> > @@ -2192,6 +2192,8 @@ static bool cpu_has_bbml2_noabort(unsigned int cpu_midr)
> >   	static const struct midr_range supports_bbml2_noabort_list[] = {
> >   		MIDR_REV_RANGE(MIDR_CORTEX_X4, 0, 3, 0xf),
> >   		MIDR_REV_RANGE(MIDR_NEOVERSE_V3, 0, 2, 0xf),
> > +		MIDR_ALL_VERSIONS(MIDR_AMPERE1),
> > +		MIDR_ALL_VERSIONS(MIDR_AMPERE1A),
> >   		{}
> >   	};
> >   
> Miko's series will move back to additionally checking MMFR2.BBM, so you will
> need to add an erratum workaround for these CPUs to set MMFR2.BBM=2 in the
> per-cpu "sanitised" feature register. See:
>
> https://lore.kernel.org/linux-arm-kernel/86ecyzorb7.wl-maz@xxxxxxxxxx/

Thank you. I will talk to our architect to see how we should handle 
this. This should not block the page table split work.

Yang

> Thanks,
> Ryan