Re: [PATCH] mtd: spi-nor: xmc: add support for XM25QH128C and XM25QH256C

From: Tudor Ambarus
Date: Tue Mar 18 2025 - 02:27:20 EST


Hi, Jakub,

Do you have access to these flashes? Can you test them?

We have a minimum testing requirement before updating or adding new
flashes, here it is:
https://docs.kernel.org/driver-api/mtd/spi-nor.html#minimum-testing-requirements

It's true that we don't have yet locking tests described, but
contributions to the documentation is welcomed!

On 17.03.2025 20:21, Jakub Czapiga wrote:
> Both chips support SFDP (JESD216).
> XM25QH128C only supports 3-bit Block-Protection with Top-Bottom
> configuration bit.
> XM25QH256C supports 4-bit Block-Protection with Top-Bottom configuration
> bit on SR(6).
>
> Signed-off-by: Jakub Czapiga <czapiga@xxxxxxxxxx>
> ---
> drivers/mtd/spi-nor/xmc.c | 12 +++++++++++-
> 1 file changed, 11 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mtd/spi-nor/xmc.c b/drivers/mtd/spi-nor/xmc.c
> index d5a06054b0dd..963a44c3909a 100644
> --- a/drivers/mtd/spi-nor/xmc.c
> +++ b/drivers/mtd/spi-nor/xmc.c
> @@ -19,7 +19,17 @@ static const struct flash_info xmc_nor_parts[] = {
> .name = "XM25QH128A",
> .size = SZ_16M,
> .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
> - },
> + }, {
> + .id = SNOR_ID(0x20, 0x40, 0x18),
> + .name = "XM25QH128C",

for the next version, drop the name and add it just as a comment above
the flash entry definition

> + .size = SZ_16M,

if flash supports SFDP, drop the size parameter, it will trigger SFDP
parsing.

> + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
> + }, {
> + .id = SNOR_ID(0x20, 0x40, 0x19),
> + .name = "XM25QH256C",
> + .size = SZ_32M,
> + .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP | SPI_NOR_TB_SR_BIT6,

same here. After switching to flash init based on SFDP, please do the
tests mentioned above.

Cheers,
ta