Re: [RFC Patch v1 1/3] cxl/core: Fix caching dport GPF DVSEC issue

[Davidlohr Bueso]

On Wed, 19 Mar 2025, Li Ming wrote:

> Per Table 8-2 in CXL r3.2 section 8.1.1 and CXL r3.2 section 8.1.6, only
> CXL Downstream switch ports and CXL root ports have GPF DVSEC for CXL
> Port(DVSEC ID 04h).
>
> CXL subsystem has a gpf_dvsec in struct cxl_port which is used to cache
> the offset of a GPF DVSEC in PCIe configuration space. It will be
> updated during the first EP attaching to the cxl_port, so the gpf_dvsec
> can only cache the GPF DVSEC offset of the dport which the first EP is
> under. Will not have chance to update it during other EPs attaching.
> That means CXL subsystem will use the same GPF DVSEC offset for all
> dports under the port, it will be a problem if the GPF DVSEC offset
> cached in cxl_port is not the right offset for a dport.
>
> Moving gpf_dvsec from struct cxl_port to struct cxl_dport, make every
> cxl dport has their own GPF DVSEC offset caching, and each cxl dport
> uses its own GPF DVSEC offset for GPF DVSEC accessing.

This conversion looks good if necessary.

Reviewed-by: Davidlohr Bueso <dave@xxxxxxxxxxxx>