Re: [PATCH v1] arm64: dts: qcom: sa8775p: Add default pin configurations for QUP SEs

[Viken Dadhaniya]

On 3/4/2025 10:05 AM, Bjorn Andersson wrote:
> On Tue, Feb 25, 2025 at 09:11:36PM +0530, Viken Dadhaniya wrote:
> > Default pinctrl configurations for all QUP (Qualcomm Universal Peripheral)
> > Serial Engines (SEs) are missing in the SoC device tree. These
> > configurations are required by client teams when enabling any SEs as I2C,
> > SPI, or Serial protocols.
> >
> > Add default pin configurations for Serial Engines (SEs) for all supported
> > protocols, including I2C, SPI, and UART, to the sa8775p device tree.  This
> > change facilitates slave device driver clients to enable usecase with
> > minimal modifications.
> >
> > Additionally, move default pin configurations from target-specific files to
> > the SoC device tree file, as all possible pin configurations are now
> > comprehensively included in the SoC device tree, similar to other SoCs.
> >
> > Signed-off-by: Viken Dadhaniya <quic_vdadhani@xxxxxxxxxxx>
> > ---
> >   arch/arm64/boot/dts/qcom/sa8775p-ride.dtsi |  88 --
> >   arch/arm64/boot/dts/qcom/sa8775p.dtsi      | 908 +++++++++++++++++++++
> >   2 files changed, 908 insertions(+), 88 deletions(-)
> [..]
> > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> [..]
> > +			qup_i2c0_default: qup-i2c0-state {
> > +				pins = "gpio20", "gpio21";
> > +				function = "qup0_se0";
> > +				drive-strength = <2>;
> > +				bias-pull-up;
>
> Look at other examples, such as sc7280.dtsi, and you will see that
> drive-strength and bias are considered board-specific properties and
> should thereby not go in the soc.dtsi file.

Removed drive-strength and bias in v2.

> Thanks,
> Bjorn