Re: [PATCH v4 3/3] iommu: Drop sw_msi from iommu_domain
From: Nathan Chancellor
Date: Mon Mar 24 2025 - 16:44:04 EST
On Mon, Mar 24, 2025 at 05:05:01PM -0300, Jason Gunthorpe wrote:
> On Mon, Mar 24, 2025 at 10:07:43AM -0700, Nathan Chancellor wrote:
>
> > diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c
> > index 0f4cc15ded1c..2b81166350ae 100644
> > --- a/drivers/iommu/iommu.c
> > +++ b/drivers/iommu/iommu.c
> > @@ -3661,7 +3661,6 @@ int iommu_dma_prepare_msi(struct msi_desc *desc, phys_addr_t msi_addr)
> > ret = iommufd_sw_msi(group->domain, desc, msi_addr);
> > break;
> > default:
> > - ret = -EOPNOTSUPP;
> > break;
> > }
> > }
>
> Can we explain why this scenario has a 0 cookie_type?
>
> Actually.. Is it just an identity domain? Nicolin did you test this on
> your arm system with a device using identity (iommu=pt kernel param)?
> I would expect identity to end up with a 0 cookie because we never
> setup dma-iommu.c code on it.
>
> Should we be testing for identity to return 0 instead?
For the record, the particular system I noticed the issue on does need
"iommu.passthrough=1" (which is the ARM equivalent to "iommu=pt" IIUC?)
to boot due to a lack of firmware support for IORT RMR, so I think the
answer to your first question is probably yes?
Cheers,
Nathan