[tip: x86/cpu] x86/cacheinfo: Use sysfs_emit() for sysfs attributes show()
From: tip-bot2 for Ahmed S. Darwish
Date: Tue Mar 25 2025 - 05:40:49 EST
The following commit has been merged into the x86/cpu branch of tip:
Commit-ID: 071f4ad6494aff76589ca30a2d13e74bc1e33e0f
Gitweb: https://git.kernel.org/tip/071f4ad6494aff76589ca30a2d13e74bc1e33e0f
Author: Ahmed S. Darwish <darwi@xxxxxxxxxxxxx>
AuthorDate: Mon, 24 Mar 2025 14:33:09 +01:00
Committer: Ingo Molnar <mingo@xxxxxxxxxx>
CommitterDate: Tue, 25 Mar 2025 10:22:43 +01:00
x86/cacheinfo: Use sysfs_emit() for sysfs attributes show()
Per Documentation/filesystems/sysfs.rst, a sysfs attribute's show()
method should only use sysfs_emit() or sysfs_emit_at() when returning
values to user space.
Use sysfs_emit() for the AMD L3 cache sysfs attributes cache_disable_0,
cache_disable_1, and subcaches.
Signed-off-by: Ahmed S. Darwish <darwi@xxxxxxxxxxxxx>
Signed-off-by: Ingo Molnar <mingo@xxxxxxxxxx>
Cc: H. Peter Anvin <hpa@xxxxxxxxx>
Cc: Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx>
Link: https://lore.kernel.org/r/20250324133324.23458-15-darwi@xxxxxxxxxxxxx
---
arch/x86/kernel/cpu/amd_cache_disable.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/x86/kernel/cpu/amd_cache_disable.c b/arch/x86/kernel/cpu/amd_cache_disable.c
index 6d53aee..d860ad3 100644
--- a/arch/x86/kernel/cpu/amd_cache_disable.c
+++ b/arch/x86/kernel/cpu/amd_cache_disable.c
@@ -66,9 +66,9 @@ static ssize_t show_cache_disable(struct cacheinfo *ci, char *buf, unsigned int
index = amd_get_l3_disable_slot(nb, slot);
if (index >= 0)
- return sprintf(buf, "%d\n", index);
+ return sysfs_emit(buf, "%d\n", index);
- return sprintf(buf, "FREE\n");
+ return sysfs_emit(buf, "FREE\n");
}
#define SHOW_CACHE_DISABLE(slot) \
@@ -189,7 +189,7 @@ static ssize_t subcaches_show(struct device *dev, struct device_attribute *attr,
struct cacheinfo *ci = dev_get_drvdata(dev);
int cpu = cpumask_first(&ci->shared_cpu_map);
- return sprintf(buf, "%x\n", amd_get_subcaches(cpu));
+ return sysfs_emit(buf, "%x\n", amd_get_subcaches(cpu));
}
static ssize_t subcaches_store(struct device *dev,