Re: [PATCH v6 net-next PATCH 1/1] net: phy: air_en8811h: Add clk provider for CKO pin

[Jakub Kicinski]

On Mon, 24 Mar 2025 22:27:59 +0800 Lucien.Jheng wrote:
> EN8811H outputs 25MHz or 50MHz clocks on CKO, selected by GPIO3.
> CKO clock operates continuously from power-up through md32 loading.
> Implement clk provider driver so we can disable the clock output in case
> it isn't needed, which also helps to reduce EMF noise
> 
> Signed-off-by: Lucien.Jheng <lucienx123@xxxxxxxxx>

This was posted after merge window started, so let me give you some
extra nit picks and please repost after April 7th.

> +static int en8811h_clk_enable(struct clk_hw *hw)
> +{
> +	struct en8811h_priv *priv = clk_hw_to_en8811h_priv(hw);
> +	struct phy_device *phydev = priv->phydev;
> +
> +	return air_buckpbus_reg_modify(phydev, EN8811H_CLK_CGM,
> +				EN8811H_CLK_CGM_CKO, EN8811H_CLK_CGM_CKO);

misaligned, continuation should align to opening bracket

> +static int en8811h_clk_is_enabled(struct clk_hw *hw)
> +{
> +	struct en8811h_priv *priv = clk_hw_to_en8811h_priv(hw);
> +	struct phy_device *phydev = priv->phydev;
> +	int ret = 0;

unnecessary init

> +	u32 pbus_value;
> +
> +	ret = air_buckpbus_reg_read(phydev, EN8811H_CLK_CGM, &pbus_value);
> +	if (ret < 0)
> +		return ret;
> +
> +	return (pbus_value & EN8811H_CLK_CGM_CKO);
> +}
> +
> +static const struct clk_ops en8811h_clk_ops = {
> +	.recalc_rate = en8811h_clk_recalc_rate,
> +	.enable = en8811h_clk_enable,
> +	.disable = en8811h_clk_disable,

these are not tab-aligned

> +	.is_enabled	= en8811h_clk_is_enabled,

this one is

> +};
> +
> +static int en8811h_clk_provider_setup(struct device *dev,
> +				      struct clk_hw *hw)

no need to wrap this line

> +{
> +	struct clk_init_data init;
> +	int ret;
> +
> +	if (!IS_ENABLED(CONFIG_COMMON_CLK))
> +		return 0;
> +
> +	init.name =  devm_kasprintf(dev, GFP_KERNEL, "%s-cko",
> +				    fwnode_get_name(dev_fwnode(dev)));

double space
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