Re: [PATCH 2/2] clocksource/drivers/nxp-timer: Add the System Timer Module for the s32g platform
From: Daniel Lezcano
Date: Wed Mar 26 2025 - 04:07:49 EST
On 26/03/2025 08:44, Ghennadi Procopciuc wrote:
On 3/25/2025 3:54 PM, Daniel Lezcano wrote:
On 25/03/2025 14:21, Ghennadi Procopciuc wrote:
On 3/25/2025 2:51 PM, Daniel Lezcano wrote:
[ ... ]
This wouldn't be the case if the STM is kept running/counting during
the
clock event setup, with only the clock event interrupt being disabled
(CCR.CEN).
Are you asking to use two different channels for the same STM instance,
one for the clocksource and one for the clockevent ?
I suggested using the CNT register to obtain the count for the clock
source, while using one of the STM channels for the clock event.
Ah, ok.
I think it is preferable to keep them separated to keep the code
modular. Given the number of STM on the platform, it does not hurt
The S32G2 and S32G3 are SoCs featuring a diverse set of cores. Linux is
expected to run on Cortex-A53 cores, while other software stacks will
operate on Cortex-M cores. The number of STM instances has been sized to
include at most one instance per core. Allocating six instances (1 clock
source, 1 broadcast clock event, and 4 clock events for all A53 cores)
to Linux on the S32G2 leaves the M7 software stacks without adequate STM
coverage.
Mmh, right. From this perspective it makes sense.
Additionally, the proposed implementation uses only one STM channel out
of four, which is not optimal hardware usage. I suggest using all STM
channels instead of limiting it to a single channel per instance, given
that the driver already uses a global structure to pair STM instances
with cores. This approach will optimize the number of instances required
by Linux and leverage the capabilities of each STM.
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