Re: [PATCH v5 02/13] dt-bindings: clock: Add cpg for the Renesas RZ/T2H SoC

[Paul Barker]

On 26/03/2025 07:49, Krzysztof Kozlowski wrote:
> On Tue, Mar 25, 2025 at 05:08:50PM +0100, Thierry Bultel wrote:
>> Document RZ/T2H (a.k.a r9a09g077) cpg-mssr (Clock Pulse Generator) binding.
>>
>> Signed-off-by: Thierry Bultel <thierry.bultel.yh@xxxxxxxxxxxxxx>
>> ---
>> Changes v4->v5:
>>   - Set reg minItems and maxItems defaults at top level
>> Changes v3->v4:
>>   - Handle maxItems and clocks names properly in schema. 
> 
> 
> Can you start using b4 or send patchsets in standard way? No links to
> previous versions in changelog and b4 diff does not work:
> 
> b4 diff '20250325160904.2688858-1-thierry.bultel.yh@xxxxxxxxxxxxxx'
> Grabbing thread from lore.kernel.org/all/20250325160904.2688858-1-thierry.bultel.yh@xxxxxxxxxxxxxx/t.mbox.gz
> Checking for older revisions
> Grabbing search results from lore.kernel.org
>   Added from v4: 14 patches
> ---
> Analyzing 140 messages in the thread
> Preparing fake-am for v4: dt-bindings: soc: Add Renesas RZ/T2H (R9A09G077) SoC
> ERROR: Could not fake-am version v4
> ---
> Could not create fake-am range for lower series v4

Hi Krzysztof,

The above b4 command works for me. Which b4 version are you using and
which base tree do you have checked out?

FYI, this series now applies cleanly on top of tty-next as Geert's
patch [1] has been integrated.

[1]: https://lore.kernel.org/linux-renesas-soc/11c2eab45d48211e75d8b8202cce60400880fe55.1741114989.git.geert+renesas@xxxxxxxxx/T/#u

Thanks,

-- 
Paul Barker

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