On Wed, Mar 26, 2025 at 02:20:55PM +0000, Pinkesh Vaghela wrote:
On Tue, Mar 25, 2025 at 7:06 PM, Emil Renner Berthing wrote:
Pinkesh Vaghela wrote:
+ soc {
+ compatible = "simple-bus";
+ ranges;
+ interrupt-parent = <&plic>;
+ #address-cells = <2>;
+ #size-cells = <2>;
Hi Pinkesh,
Thank your for the patches!
Should this not be marked dma-noncoherent to avoid having to mark each
peripheral as such?
Thanks for your feedback.
We have not added "dma-noncoherent" because there are no DMA-capable
peripherals in the devicetree yet.
We planned to add this later when we add any DMA capable devices
i.e. sdhci, gmac, sata, pcie, spi.
Do you recommend to add this property in current version?
If the bus is not cache coherent, then it should be marked as such now.