Re: [tip:timers/core] [posix] 1535cb8028: stress-ng.epoll.ops_per_sec 36.2% regression

[Eric Dumazet]

On Thu, Mar 27, 2025 at 2:14 PM Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote:
>
> On Thu, Mar 27 2025 at 12:37, Eric Dumazet wrote:
> > On Thu, Mar 27, 2025 at 11:50 AM Thomas Gleixner <tglx@xxxxxxxxxxxxx> wrote:
> >> Cute. How much bloat does it cause?
> >
> > This would expand 'struct ucounts' by 192 bytes on x86, if the patch
> > was actually working :)
> >
> > Note sure if it is feasible without something more intrusive like
>
> I'm not sure about the actual benefit. The problem is that parallel
> invocations which access the same ucount still will run into contention
> of the cache line they are modifying.
>
> For the signal case, all invocations increment rlimit[SIGPENDING], so
> putting that into a different cache line does not buy a lot.
>
> False sharing is when you have a lot of hot path readers on some other
> member of the data structure, which happens to share the cache line with
> the modified member. But that's not really the case here.

We applications stressing all the counters at the same time (from
different threads)

You seem to focus on posix timers only :)