[PATCH v5 0/3] openrisc: Add cacheinfo support and introduce new utility functions

[Sahil Siddiq]

Hi,

The main purpose of this series is to expose CPU cache attributes for
OpenRISC in sysfs using the cacheinfo API. The core implementation
to achieve this is in patch #3. Patch #1 and #2 add certain enhancements
to simplify the implementation of cacheinfo support.

Patch #1 removes duplication of cache-related data members in struct
cpuinfo_or1k.

Patch #2 introduces several utility functions. One set of functions is
used to check if the cache components and SPRs exist before attempting
to use them. The other set provides a convenient interface to flush or
invalidate a range of cache blocks.

While testing these changes with QEMU, I realized that the check being
performed in cpu_cache_is_present() would always get evaluated to true
when the UPR_UP bit was set. This series fixes this check and addresses
v4's review comments.

Thanks,
Sahil

Sahil Siddiq (3):
  openrisc: Refactor struct cpuinfo_or1k to reduce duplication
  openrisc: Introduce new utility functions to flush and invalidate
    caches
  openrisc: Add cacheinfo support

 arch/openrisc/include/asm/cacheflush.h |  17 ++++
 arch/openrisc/include/asm/cpuinfo.h    |  24 ++++--
 arch/openrisc/kernel/Makefile          |   2 +-
 arch/openrisc/kernel/cacheinfo.c       | 104 +++++++++++++++++++++++++
 arch/openrisc/kernel/dma.c             |  18 +----
 arch/openrisc/kernel/setup.c           |  45 +----------
 arch/openrisc/mm/cache.c               |  56 ++++++++++---
 arch/openrisc/mm/init.c                |   5 +-
 8 files changed, 196 insertions(+), 75 deletions(-)
 create mode 100644 arch/openrisc/kernel/cacheinfo.c


base-commit: ea1413e5b53a8dd4fa7675edb23cdf828bbdce1e
-- 
2.48.1