Re: [PATCH 1/7] dt-bindings: pci: cadence: Extend compatible for new platform configurations

From: Hans Zhang
Date: Sun Mar 30 2025 - 10:59:26 EST




On 2025/3/28 17:17, Krzysztof Kozlowski wrote:
EXTERNAL EMAIL

On 28/03/2025 09:48, Hans Zhang wrote:


On 2025/3/28 16:22, Krzysztof Kozlowski wrote:
EXTERNAL EMAIL

On Thu, Mar 27, 2025 at 11:19:47AM +0000, Manikandan Karunakaran Pillai wrote:
Document the compatible property for the newly added values for PCIe EP and
RP configurations. Fix the compilation issues that came up for the existing
Cadence bindings

Signed-off-by: Manikandan K Pillai <mpillai@xxxxxxxxxxx>
---
.../bindings/pci/cdns,cdns-pcie-ep.yaml | 12 +-
.../bindings/pci/cdns,cdns-pcie-host.yaml | 119 +++++++++++++++---
2 files changed, 110 insertions(+), 21 deletions(-)

One more thing: SoB mismatch. Maybe got corrupted by Microsoft (it is
known), so you really need to fix your mailing setup or use b4 relay.


Hi Krzysztof,

I have obtained Manikandan's consent and we will collaborate to submit

It does not matter. You still need proper SoB / DCO chain. Please follow
submitting patches.


Hi Krzysztof,

Thank you very much for reminding me. I will pay attention to it.

Thanks
Hans