Re: [PATCH v5] drm/dp: clamp PWM bit count to advertised MIN and MAX capabilities
From: Dmitry Baryshkov
Date: Sun Mar 30 2025 - 13:56:37 EST
On Sun, Mar 30, 2025 at 06:49:40PM +0100, Christopher Obbard wrote:
> According to the eDP specification (VESA Embedded DisplayPort Standard
> v1.4b, Section 3.3.10.2), if the value of DP_EDP_PWMGEN_BIT_COUNT is
> less than DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, the sink is required to use
> the MIN value as the effective PWM bit count.
>
> This commit updates the logic to clamp the reported
> DP_EDP_PWMGEN_BIT_COUNT to the range defined by
> DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN and _CAP_MAX. As part of this change,
> the behavior is modified such that reading _CAP_MIN and _CAP_MAX
> registers is now required to succeed. Before reading these registers
> was optional.
Describe why, not what. Something like 'is now required to succeed,
otherwise bl->max value can end up being not set, although
drm_edp_backlight_probe_max() returned success'.
LGTM otherwise.
> This ensures correct handling of eDP panels that report a zero PWM
> bit count but still provide valid non-zero MIN and MAX capability
> values. Without this clamping, brightness values may be interpreted
> incorrectly, leading to a dim or non-functional backlight.
>
> For example, the Samsung ATNA40YK20 OLED panel used in the Lenovo
> ThinkPad T14s Gen6 (Snapdragon) reports a PWM bit count of 0, but
> supports AUX backlight control and declares a valid 11-bit range.
> Clamping ensures brightness scaling works as intended on such panels.
>
> Co-developed-by: Rui Miguel Silva <rui.silva@xxxxxxxxxx>
> Signed-off-by: Rui Miguel Silva <rui.silva@xxxxxxxxxx>
> Signed-off-by: Christopher Obbard <christopher.obbard@xxxxxxxxxx>
--
With best wishes
Dmitry