Re: [PATCH 08/15] dt-bindings: clock: renesas: Document RZ/V2N SoC CPG

[Rob Herring (Arm)]

On Wed, 26 Mar 2025 14:39:38 +0000, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> 
> Document the device tree bindings for the Renesas RZ/V2N (R9A09G056)
> SoC Clock Pulse Generator (CPG).
> 
> Update `renesas,rzv2h-cpg.yaml` to include the compatible string for
> RZ/V2N SoC and adjust the title and description accordingly.
> 
> Additionally, introduce `renesas,r9a09g056-cpg.h` to define core clock
> constants for the RZ/V2N SoC. Note the existing RZ/V2H(P) family-specific
> clock driver will be reused for this SoC.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> ---
>  .../bindings/clock/renesas,rzv2h-cpg.yaml     |  5 ++--
>  .../dt-bindings/clock/renesas,r9a09g056-cpg.h | 24 +++++++++++++++++++
>  2 files changed, 27 insertions(+), 2 deletions(-)
>  create mode 100644 include/dt-bindings/clock/renesas,r9a09g056-cpg.h
> 

Acked-by: Rob Herring (Arm) <robh@xxxxxxxxxx>