Re: [PATCH 0/4] iio: ad3552r-hs: add support for internal ramp generator
From: Nuno Sá
Date: Tue Apr 01 2025 - 05:21:08 EST
On Mon, 2025-03-31 at 21:11 +0200, Angelo Dureghello wrote:
> Hi Jonathan,
>
> On 30.03.2025 17:53, Jonathan Cameron wrote:
> > On Fri, 21 Mar 2025 21:28:47 +0100
> > Angelo Dureghello <adureghello@xxxxxxxxxxxx> wrote:
> >
> > > Add support to enable the HDL IP core internal ramp generator,
> > > actually managed by the adi-axi-dac backend.
> >
> > What is it for? Circuit testing or something else?
> > We have in the past had pattern generators in IIO (currently under
> > frequency drivers, though I'm not sure what we have in the way of
> > waveforms in the stuff outside staging) so I'd like to be sure
> > this is about debug rather than a pattern that is actually expected
> > to be useful.
> >
>
> Sorry form some reason seen this too late, just sent a v2.
>
> Anyway, the signal is a tooth wave at 280Hz, not sure that pattern
> can be of any use except for some dabug cases, or noise tests.
>
Yes, typical usecase for this is to debug/validate the serial interfaces. I'm
used to this see for LVDS/CMOS though (but I would assume the principle to be
the same).
- Nuno Sá