Re: [PATCH v3 6/6] x86/bugs: Add RSB mitigation document

[Josh Poimboeuf]

On Thu, Apr 03, 2025 at 09:57:29AM +0700, Bagas Sanjaya wrote:
> On Wed, Apr 02, 2025 at 11:19:23AM -0700, Josh Poimboeuf wrote:
> > +    Note that some Intel CPUs are susceptible to Post-barrier Return
> > +    Stack Buffer Predictions (PBRSB)[#intel-pbrsb]_, where the last CALL
> > +    from the guest can be used to predict the first unbalanced RET.  In
> > +    this case the PBRSB mitigation is needed in addition to eIBRS.
> 
> I get Sphinx unreferenced footnote warning:
> 
> Documentation/admin-guide/hw-vuln/rsb.rst:221: WARNING: Footnote [#] is not referenced. [ref.footnote]
> 
> To fix that, I have to separate the footnote:
> 
> ---- >8 ----
> diff --git a/Documentation/admin-guide/hw-vuln/rsb.rst b/Documentation/admin-guide/hw-vuln/rsb.rst
> index 97bf75993d5d43..dd727048b00204 100644
> --- a/Documentation/admin-guide/hw-vuln/rsb.rst
> +++ b/Documentation/admin-guide/hw-vuln/rsb.rst
> @@ -102,7 +102,7 @@ there are unbalanced CALLs/RETs after a context switch or VMEXIT.
>  	at the time of the VM exit." [#intel-eibrs-vmexit]_
>  
>      Note that some Intel CPUs are susceptible to Post-barrier Return
> -    Stack Buffer Predictions (PBRSB)[#intel-pbrsb]_, where the last CALL
> +    Stack Buffer Predictions (PBRSB) [#intel-pbrsb]_, where the last CALL
>      from the guest can be used to predict the first unbalanced RET.  In
>      this case the PBRSB mitigation is needed in addition to eIBRS.

Fixed, thanks!

-- 
Josh