Re: [PATCH v6 2/2] PCI: xilinx-cpm: Add support for PCIe RP PERST# signal

[Krzysztof Kozlowski]

On 04/04/2025 09:03, Musham, Sai Krishna wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
> 
> Hi Krzysztof,
> 
> Thank you for reviewing.
> 
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzk@xxxxxxxxxx>
>> Sent: Thursday, March 27, 2025 11:38 PM
>> To: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>; Musham, Sai
>> Krishna <sai.krishna.musham@xxxxxxx>
>> Cc: bhelgaas@xxxxxxxxxx; lpieralisi@xxxxxxxxxx; kw@xxxxxxxxx; robh@xxxxxxxxxx;
>> krzk+dt@xxxxxxxxxx; conor+dt@xxxxxxxxxx; cassel@xxxxxxxxxx; linux-
>> pci@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
>> Simek, Michal <michal.simek@xxxxxxx>; Gogada, Bharat Kumar
>> <bharat.kumar.gogada@xxxxxxx>; Havalige, Thippeswamy
>> <thippeswamy.havalige@xxxxxxx>
>> Subject: Re: [PATCH v6 2/2] PCI: xilinx-cpm: Add support for PCIe RP PERST#
>> signal
>>
>> Caution: This message originated from an External Source. Use proper caution
>> when opening attachments, clicking links, or responding.
>>
>>
>> On 27/03/2025 18:25, Manivannan Sadhasivam wrote:
>>>>  /**
>>>> @@ -551,6 +600,27 @@ static int xilinx_cpm_pcie_parse_dt(struct
>> xilinx_cpm_pcie *port,
>>>>              port->reg_base = port->cfg->win;
>>>>      }
>>>>
>>>> +    port->crx_base = devm_platform_ioremap_resource_byname(pdev,
>>>> +                                                           "cpm_crx");
>>>> +    if (IS_ERR(port->crx_base)) {
>>>> +            if (PTR_ERR(port->crx_base) == -EINVAL)
>>>> +                    port->crx_base = NULL;
>>>> +            else
>>>> +                    return PTR_ERR(port->crx_base);
>>>> +    }
>>>> +
>>>> +    if (port->variant->version == CPM5NC_HOST) {
>>>> +            port->cpm5nc_attr_base =
>>>> +                    devm_platform_ioremap_resource_byname(pdev,
>>>> +
>>>> + "cpm5nc_attr");
>>>
>>> Where is this resource defined in the binding?
>>>
>>
>> So this is v6 and still not tested.
>>
>> Where is the DTS using this binding and driver, so we can verify that AMD is not
>> sending us such totally bogus, downstream code?
>>
> 
> This patch is tested for mentioned CPM versions, I apologize that

No, it wasn't. Testing would point that out.

> I missed adding the cpm5nc_attr resource in DT binding. I will not
> repeat this again. I will add the resource in the next patch.
> Thanks for your understanding.

Again, where is the DTS?

Best regards,
Krzysztof