Re: [PATCH 6/9] dt-bindings: cache: ax45mp-cache: allow variable cache-sets for Andes L2 cache

From: Rob Herring (Arm)
Date: Mon Apr 07 2025 - 10:22:54 EST



On Mon, 07 Apr 2025 18:49:34 +0800, Ben Zong-You Xie wrote:
> The current device tree binding for the Andes AX45MP L2 cache enforces
> a fixed number of cache-sets (1024). However, there are 2048 cache-sets in
> the QiLai SoC. This change allows both 1024 and 2048 as valid values for
> "cache-sets".
>
> Signed-off-by: Ben Zong-You Xie <ben717@xxxxxxxxxxxxx>
> ---
> .../devicetree/bindings/cache/andestech,ax45mp-cache.yaml | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>

Acked-by: Rob Herring (Arm) <robh@xxxxxxxxxx>