RE: [PATCH v3 3/6] PCI: imx6: Workaround i.MX95 PCIe may not exit L23 ready

[Hongxing Zhu]

> -----Original Message-----
> From: Hongxing Zhu
> Sent: 2025年4月3日 11:23
> To: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> Cc: Frank Li <frank.li@xxxxxxx>; l.stach@xxxxxxxxxxxxxx; lpieralisi@xxxxxxxxxx;
> kw@xxxxxxxxx; robh@xxxxxxxxxx; bhelgaas@xxxxxxxxxx;
> shawnguo@xxxxxxxxxx; s.hauer@xxxxxxxxxxxxxx; kernel@xxxxxxxxxxxxxx;
> festevam@xxxxxxxxx; linux-pci@xxxxxxxxxxxxxxx;
> linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; imx@xxxxxxxxxxxxxxx;
> linux-kernel@xxxxxxxxxxxxxxx
> Subject: RE: [PATCH v3 3/6] PCI: imx6: Workaround i.MX95 PCIe may not exit
> L23 ready
> 
> > -----Original Message-----
> > From: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> > Sent: 2025年4月2日 23:18
> > To: Hongxing Zhu <hongxing.zhu@xxxxxxx>
> > Cc: Frank Li <frank.li@xxxxxxx>; l.stach@xxxxxxxxxxxxxx;
> > lpieralisi@xxxxxxxxxx; kw@xxxxxxxxx; robh@xxxxxxxxxx;
> > bhelgaas@xxxxxxxxxx; shawnguo@xxxxxxxxxx; s.hauer@xxxxxxxxxxxxxx;
> > kernel@xxxxxxxxxxxxxx; festevam@xxxxxxxxx; linux-pci@xxxxxxxxxxxxxxx;
> > linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; imx@xxxxxxxxxxxxxxx;
> > linux-kernel@xxxxxxxxxxxxxxx
> > Subject: Re: [PATCH v3 3/6] PCI: imx6: Workaround i.MX95 PCIe may not
> > exit L23 ready
> >
> > On Wed, Apr 02, 2025 at 07:59:26AM +0000, Hongxing Zhu wrote:
> > > > -----Original Message-----
> > > > From: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> > > > Sent: 2025年4月2日 15:08
> > > > To: Hongxing Zhu <hongxing.zhu@xxxxxxx>
> > > > Cc: Frank Li <frank.li@xxxxxxx>; l.stach@xxxxxxxxxxxxxx;
> > > > lpieralisi@xxxxxxxxxx; kw@xxxxxxxxx; robh@xxxxxxxxxx;
> > > > bhelgaas@xxxxxxxxxx; shawnguo@xxxxxxxxxx; s.hauer@xxxxxxxxxxxxxx;
> > > > kernel@xxxxxxxxxxxxxx; festevam@xxxxxxxxx;
> > > > linux-pci@xxxxxxxxxxxxxxx; linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> > > > imx@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx
> > > > Subject: Re: [PATCH v3 3/6] PCI: imx6: Workaround i.MX95 PCIe may
> > > > not exit L23 ready
> > > >
> > > > On Fri, Mar 28, 2025 at 11:02:10AM +0800, Richard Zhu wrote:
> > > > > ERR051624: The Controller Without Vaux Cannot Exit L23 Ready
> > > > > Through Beacon or PERST# De-assertion
> > > >
> > > > Is it possible to share the link to the erratum?
> > > >
> > > Sorry, the erratum document isn't ready to be published yet.
> > > > >
> > > > > When the auxiliary power is not available, the controller cannot
> > > > > exit from
> > > > > L23 Ready with beacon or PERST# de-assertion when main power is
> > > > > not removed.
> > > > >
> > > >
> > > > I don't understand how the presence of Vaux affects the controller.
> > > > Same goes for PERST# deassertion. How does that relate to Vaux? Is
> > > > this erratum for a specific endpoint behavior?
> > > IMHO I don't know the exact details of the power supplies in this IP design.
> > > Refer to my guess , maybe the beacon detect or wake-up logic in
> > > designs is  relied on the status of SYS_AUX_PWR_DET signals in this case.
> >
> > Can you please try to get more details? I couldn't understand the errata.
> >
> Sure. Will contact designer and try to get more details.
Hi Mani:
Get some information from designs, the internal design logic is relied on the
 status of SYS_AUX_PWR_DET signal to handle the low power stuff.
So, the SYS_AUX_PWR_DET is required to be 1b'1 in the SW workaround.

Best Regards
Richard Zhu

> 
> Best Regards
> Richard Zhu
> > - Mani
> >
> > --
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