Re: [PATCH v3 1/2] dt-bindings: watchdog: Add NXP Software Watchdog Timer

From: Daniel Lezcano
Date: Tue Apr 08 2025 - 05:04:04 EST


On 08/04/2025 10:21, Krzysztof Kozlowski wrote:
On 07/04/2025 18:03, Daniel Lezcano wrote:
+
+allOf:
+ - $ref: watchdog.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: nxp,s32g2-swt
+ - items:
+ - const: nxp,s32g3-swt
+ - const: nxp,s32g2-swt
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: Counter clock
+ - description: Module clock
+ - description: Register clock
+ minItems: 1

Why clocks are flexible? The SoC does not change between boards. It
should be a fixed list - block receives that number of clocks or does
not... unless you meant that different instances of the block have
different clocks?

The documentation describe the watchdog module with a clock for the counter, a clock for the register and the last one for the module.

IIUC, these clocks are enabled when the system is powered-on or exits suspend.

The driver does not have a control on them.

The only usage of the clock is to retrieve the rate of the counter in order to compute the maximum timeout. So only one is needed.

However Ghennadi would like to describe the register and the module clocks in case there is SoC variant where it is possible to have control on them [1]

The goal is to give the description the flexibility to describe just one because the other ones are not needed for this s32g2/3 platform.


[1] https://lore.kernel.org/all/93d83df2-d3bc-e32d-70a6-158571504275@xxxxxxxxxxx/

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