Re: [PATCH] x86/cpufeatures: Clean up formatting

[Xin Li]

On 4/10/2025 10:25 AM, Borislav Petkov wrote:
> On Thu, Apr 10, 2025 at 10:11:56AM -0700, Xin Li wrote:
> > On 4/10/2025 9:54 AM, Borislav Petkov wrote:
> > > @@ -477,10 +477,10 @@
> > >    #define X86_FEATURE_BHI_CTRL		(21*32+ 2) /* BHI_DIS_S HW control available */
> > >    #define X86_FEATURE_CLEAR_BHB_HW	(21*32+ 3) /* BHI_DIS_S HW control enabled */
> > >    #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
> > > -#define X86_FEATURE_AMD_FAST_CPPC	(21*32 + 5) /* Fast CPPC */
> > > -#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
> > > -#define X86_FEATURE_AMD_WORKLOAD_CLASS	(21*32 + 7) /* Workload Classification */
> > > -#define X86_FEATURE_PREFER_YMM		(21*32 + 8) /* Avoid ZMM registers due to downclocking */
> > > +#define X86_FEATURE_AMD_FAST_CPPC	(21*32+ 5) /* Fast CPPC */
> > > +#define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32+ 6) /* Heterogeneous Core Topology */
> > > +#define X86_FEATURE_AMD_WORKLOAD_CLASS	(21*32+ 7) /* Workload Classification */
> > > +#define X86_FEATURE_PREFER_YMM		(21*32+ 8) /* Avoid ZMM registers due to downclocking */
> >
> > Ha, I did a similar cleanup with adding the immediate MSR instruction
> > support (you asked to use scattered):
> >
> > https://lore.kernel.org/lkml/20250331082251.3171276-9-xin@xxxxxxxxx/
>
> Except you're moving the numbers one column to the right while the other
> columns remain at that indentation.
>
> Instead of re-tabulating that whole file, I think we should simply shorten
> those
>
> X86_FEATURE_AMD_HETEROGENEOUS_CORES and X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT
>
> straddlers.

Good idea.

I ever had a patch in which the last column of the same type macros are
not aligned and tglx asked me to make them aligned.  But that didn't
need any name shortened.

Thanks!
    Xin