Re: [RESEND net-next v5 1/4] net: phy: realtek: Group RTL82* macro definitions

[Michael Klein]

On Tue, Apr 08, 2025 at 02:17:19PM +0200, Andrew Lunn wrote:
> On Mon, Apr 07, 2025 at 07:52:50PM -0700, Joe Damato wrote:
> > On Mon, Apr 07, 2025 at 08:21:40PM +0200, Michael Klein wrote:
> > >  #define RTL821x_PHYSR				0x11
> > >  #define RTL821x_PHYSR_DUPLEX			BIT(13)
> > >  #define RTL821x_PHYSR_SPEED			GENMASK(15, 14)
> > > @@ -31,6 +40,10 @@
> > >  #define RTL821x_EXT_PAGE_SELECT			0x1e
> > >  #define RTL821x_PAGE_SELECT			0x1f
> > >
> > > +#define RTL8211E_CTRL_DELAY			BIT(13)
> > > +#define RTL8211E_TX_DELAY			BIT(12)
> > > +#define RTL8211E_RX_DELAY			BIT(11)
> >
> > Maybe I'm reading this wrong but these don't seem sorted
> > lexicographically ?
>
> This i don't follow, you normally keep register bits next to the
> register. This is particularly important when the register bits don't
> have the register name embedded within it.

Well, there is no definition for the register these bits pertain to, 
and adding one in _this_ patch would break the scope of this change. So 
I will address this in a later patch of this series in the next version.

--
Michael