Re: [PATCH v2 1/3] dt-bindings: accel: add device tree for AMD PKI accelerator

From: Jeff Hugo
Date: Fri Apr 11 2025 - 12:17:46 EST


On 4/9/2025 11:30 AM, Nipun Gupta wrote:

No cover letter?

Add binding documentation for AMD PKI accelerator supported for AMD
versal-net SoC.

AMD PKI accelerator is a device on AMD versa-net SoC to execute public key
asymmetric crypto operations like ECDSA, ECDH, RSA etc. with high performance.
The driver provides accel interface to applications for configuring the device
and performing the required operations. AMD PKI device comprises of multiple
Barco Silex ba414 PKI engines bundled together, and providing a queue based
interface to interact with the device.

+------------------+
| Software |
+------------------+
| |
| v
| +-----------------------------------------------------------+
| | RAM |
| | +----------------------------+ +---------------------+ |
| | | RQ pages | | CQ pages | |
| | | +------------------------+ | | +-----------------+ | |
| | | | START (cmd) | | | | req_id | status | | |
| | | | TFRI (addr, sz)---+ | | | | req_id | status | | |
| | | | +-TFRO (addr, sz) | | | | | ... | | |
| | | | | NTFY (req_id) | | | | +-----------------+ | |
| | | +-|-------------------|--+ | | | |
| | | | v | +---------------------+ |
| | | | +-----------+ | |
| | | | | input | | |
| | | | | data | | |
| | | v +-----------+ | |
| | | +----------------+ | |
| | | | output data | | |
| | | +----------------+ | |
| | +----------------------------+ |
| | |
| +-----------------------------------------------------------+
|
|
+---|----------------------------------------------------+
| v AMD PKI device |
| +-------------------+ +------------------------+ |
| | New request FIFO | --> | PK engines | |
| +-------------------+ +------------------------+ |
+--------------------------------------------------------+

To perform a crypto operation, the software writes a sequence of descriptors,
into the RQ memory. This includes input data and designated location for the
output data. After preparing the request, request offset (from the RQ memory
region) is written into the NEW_REQUEST register. Request is then stored in a
common hardware FIFO shared among all RQs.

When a PK engine becomes available, device pops the request from the FIFO and
fetches the descriptors. It DMAs the input data from RQ memory and executes
the necessary computations. After computation is complete, the device writes
output data back to RAM via DMA. Device then writes a new entry in CQ ring
buffer in RAM, indicating completion of the request. Device also generates
an interrupt for notifying completion to the software.

Signed-off-by: Nipun Gupta <nipun.gupta@xxxxxxx>
---

The patch series was originally submitted as misc driver:
https://lore.kernel.org/all/20250312095421.1839220-1-nipun.gupta@xxxxxxx/

As suggested by Greg, the driver does not fit in misc and should be part
of accel or crypto. Accel is well suited for AMD PKI Crypto Accelerator,
and thus the driver is updated as an accel driver and yaml moved to
newly created accel folder.

Why does this not fit in crypto?