On Sun, Apr 13, 2025 at 11:14 PM Xianwei Zhao <xianwei.zhao@xxxxxxxxxxx> wrote:
Hi Neil,
Thanks for your reply.
On 2025/4/9 20:35, neil.armstrong@xxxxxxxxxx wrote:
Hi,
On 09/04/2025 03:49, Xianwei Zhao wrote:
Hi Neil,
Thanks for your reply.
On 2025/4/8 15:41, Neil Armstrong wrote:
[ EXTERNAL EMAIL ]Will do.
Hi,
On 08/04/2025 09:04, Xianwei Zhao via B4 Relay wrote:
From: Xianwei Zhao <xianwei.zhao@xxxxxxxxxxx>
Add DMA support for spicc driver.
DMA works if the transfer meets the following conditions:
1. 64 bits per word;
2. The transfer length must be multiples of the dma_burst_len,
and the dma_burst_len should be one of 8,7...2,
otherwise, it will be split into several SPI bursts.
Signed-off-by: Sunny Luo <sunny.luo@xxxxxxxxxxx>
Signed-off-by: Xianwei Zhao <xianwei.zhao@xxxxxxxxxxx>
---
drivers/spi/spi-meson-spicc.c | 243
++++++++++++++++++++++++++++++++++++++++--
1 file changed, 232 insertions(+), 11 deletions(-)
diff --git a/drivers/spi/spi-meson-spicc.c
b/drivers/spi/spi-meson-spicc.c
index df74ad5060f8..81e263bceba9 100644
--- a/drivers/spi/spi-meson-spicc.c
+++ b/drivers/spi/spi-meson-spicc.c
@@ -21,6 +21,7 @@
#include <linux/interrupt.h>
#include <linux/reset.h>
#include <linux/pinctrl/consumer.h>
+#include <linux/dma-mapping.h>
/*
* The Meson SPICC controller could support DMA based transfers,
but is not
@@ -33,6 +34,20 @@
* - CS management is dumb, and goes UP between every burst, so is
really a
* "Data Valid" signal than a Chip Select, GPIO link should be
used instead
* to have a CS go down over the full transfer
+ *
+ * DMA achieves a transfer with one or more SPI bursts, each SPI
burst is made
+ * up of one or more DMA bursts. The DMA burst implementation
mechanism is,
+ * For TX, when the number of words in TXFIFO is less than the preset
+ * reading threshold, SPICC starts a reading DMA burst, which reads
the preset
+ * number of words from TX buffer, then writes them into TXFIFO.
+ * For RX, when the number of words in RXFIFO is greater than the
preset
+ * writing threshold, SPICC starts a writing request burst, which
reads the
+ * preset number of words from RXFIFO, then write them into RX buffer.
+ * DMA works if the transfer meets the following conditions,
+ * - 64 bits per word
+ * - The transfer length in word must be multiples of the
dma_burst_len, and
+ * the dma_burst_len should be one of 8,7...2, otherwise, it will
be split
+ * into several SPI bursts by this driver
Fine, but then also rephrase the previous paragraph since you're
adding DMA.
Could you precise on which platform you tested the DMA ?
aq222(S4)
Will you be able to test on other platforms ?
I tested it on other platforms over the last few days. G12A and C3 and
T7(T7 CLOCK use local source).
My board SPI does not connect peripherals and is tested through a
hardware loop.
I can test it on GXL and SM1 in the next two weeks against a SPI
display and some WS2812B LCDs.
<snip>
cmd:
spi_test -D /dev/spidev0.0 -v -s 5000000 -b 64 -l
*/