[PATCH 2/2] perf/x86/intel: Allow to update user space GPRs from PEBS records

[Dapeng Mi]

Currently when user samples user space GPRs (--user-regs option) with
PEBS, the user space GPRs actually always comes from software PMI
instead of from PEBS hardware. This leads to the sampled GPRs may be
inaccurate for single PEBS record case because of the skid between
counter overflow and GPRs sampling on PMI.

For the large PEBS case, the thing is even worse. If user sets
exclude_kernel attribute, large PEBS would be used to sample user space
GPRs, but since PEBS GPRs group is not really enabled, it leads to all
samples in the large PEBS record shares a same piece of user space GPRs,
like below command shows.

perf record -e branches:pu --user-regs=ip,ax -c 100000 ./foo
perf report -D | grep "AX"

.... AX    0x000000003a0d4ead
.... AX    0x000000003a0d4ead
.... AX    0x000000003a0d4ead
.... AX    0x000000003a0d4ead
.... AX    0x000000003a0d4ead
.... AX    0x000000003a0d4ead
.... AX    0x000000003a0d4ead
.... AX    0x000000003a0d4ead
.... AX    0x000000003a0d4ead
.... AX    0x000000003a0d4ead
.... AX    0x000000003a0d4ead

So enable GPRs group for user space GPRs sampling and prioritize reading
GPRs from PEBS. If the PEBS sampled GPRs is not user space GPRs (single
PEBS record case), perf_sample_regs_user() modifies them to user space
GPRs.

Fixes: c22497f5838c ("perf/x86/intel: Support adaptive PEBS v4")
Signed-off-by: Dapeng Mi <dapeng1.mi@xxxxxxxxxxxxxxx>
---
 arch/x86/events/intel/ds.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/arch/x86/events/intel/ds.c b/arch/x86/events/intel/ds.c
index 486881fe162e..fcf9c5b26cab 100644
--- a/arch/x86/events/intel/ds.c
+++ b/arch/x86/events/intel/ds.c
@@ -1398,8 +1398,10 @@ static u64 pebs_update_adaptive_cfg(struct perf_event *event)
 	 * + precise_ip < 2 for the non event IP
 	 * + For RTM TSX weight we need GPRs for the abort code.
 	 */
-	gprs = (sample_type & PERF_SAMPLE_REGS_INTR) &&
-	       (attr->sample_regs_intr & PEBS_GP_REGS);
+	gprs = ((sample_type & PERF_SAMPLE_REGS_INTR) &&
+		(attr->sample_regs_intr & PEBS_GP_REGS)) ||
+	       ((sample_type & PERF_SAMPLE_REGS_USER) &&
+		(attr->sample_regs_user & PEBS_GP_REGS));
 
 	tsx_weight = (sample_type & PERF_SAMPLE_WEIGHT_TYPE) &&
 		     ((attr->config & INTEL_ARCH_EVENT_MASK) ==
@@ -2122,7 +2124,7 @@ static void setup_pebs_adaptive_sample_data(struct perf_event *event,
 			regs->flags &= ~PERF_EFLAGS_EXACT;
 		}
 
-		if (sample_type & PERF_SAMPLE_REGS_INTR)
+		if (sample_type & (PERF_SAMPLE_REGS_INTR | PERF_SAMPLE_REGS_USER))
 			adaptive_pebs_save_regs(regs, gprs);
 	}
 
-- 
2.40.1