Re: [PATCH v2 11/15] arm64: dts: freescale: imx93-phyboard-segin: Add CAN support

[Frank Li]

On Tue, Apr 15, 2025 at 06:33:07AM +0200, Primoz Fiser wrote:
> Add support for CAN networking on phyBOARD-Segin-i.MX93 via the flexcan1
> interface. The CAN PHY chip SN65HVD234D used on the board is compatible
> with the TCAN1043 driver using the generic "can-transceiver-phy" and is
> capable of up to 1Mbps data rate.
>
> Signed-off-by: Primoz Fiser <primoz.fiser@xxxxxxxxx>
> ---

Reviewed-by: Frank Li <Frank.Li@xxxxxxx>

> Changes in v2:
> - drop CAN regulator hack in favor or "can-transceiver-phy" mechanism
> - reword commit message
>
>  .../dts/freescale/imx93-phyboard-segin.dts    | 30 +++++++++++++++++++
>  1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> index 38b89398e646..be9c0a436734 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> +++ b/arch/arm64/boot/dts/freescale/imx93-phyboard-segin.dts
> @@ -26,6 +26,15 @@ chosen {
>  		stdout-path = &lpuart1;
>  	};
>
> +	flexcan1_tc: can-phy0 {
> +		compatible = "ti,tcan1043";
> +		#phy-cells = <0>;
> +		max-bitrate = <1000000>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_flexcan1_tc>;
> +		enable-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
> +	};
> +
>  	reg_usdhc2_vmmc: regulator-usdhc2 {
>  		compatible = "regulator-fixed";
>  		enable-active-high;
> @@ -38,6 +47,14 @@ reg_usdhc2_vmmc: regulator-usdhc2 {
>  	};
>  };
>
> +/* CAN */
> +&flexcan1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pinctrl_flexcan1>;
> +	phys = <&flexcan1_tc>;
> +	status = "okay";
> +};
> +
>  /* I2C2 */
>  &lpi2c2 {
>  	clock-frequency = <400000>;
> @@ -79,6 +96,19 @@ &usdhc2 {
>  };
>
>  &iomuxc {
> +	pinctrl_flexcan1: flexcan1grp {
> +		fsl,pins = <
> +			MX93_PAD_PDM_BIT_STREAM0__CAN1_RX	0x139e
> +			MX93_PAD_PDM_CLK__CAN1_TX		0x139e
> +		>;
> +	};
> +
> +	pinctrl_flexcan1_tc: flexcan1tcgrp {
> +		fsl,pins = <
> +			MX93_PAD_ENET2_TD3__GPIO4_IO16		0x31e
> +		>;
> +	};
> +
>  	pinctrl_lpi2c2: lpi2c2grp {
>  		fsl,pins = <
>  			MX93_PAD_I2C2_SCL__LPI2C2_SCL		0x40000b9e
> --
> 2.34.1
>