Re: [PATCH 00/10] x86/fpu: APX enablement and assorted FPU code improvements

[Ingo Molnar]

* Chang S. Bae <chang.seok.bae@xxxxxxxxx> wrote:

> On 4/12/2025 1:43 AM, Ingo Molnar wrote:
> >
> > Chang, mind sending a series of the latest version of all the pending
> > APX patches you have at the moment (and any other pending FPU patches
> > you may have), with Reviewed-by tags rolled in, etc.
> 
> Hi Ingo,
> 
> Here’s the updated patch set following up on the previous APX series [1],
> along with a collection of additional FPU-related cleanups and
> improvements that were previously posted or discussed.
> 
> The series is organized into two parts:
> 
>   1. APX Enabling (PATCH 1–5)
> 
>      These patches complete the APX bring-up. After laying the groundwork,
>      this portion finalizes the enablement:
> 
>      *  Patches 1, 2, and 4 are typical xfeature plumbing.
> 
>      *  Patch 3 handles MPX conflict -- unexpected hardware issue
> 
>      *  Patch 5 adds a test case.
> 
>   2. Miscellaneous FPU Code Improvements (PATCH 6–10)
> 
>      This batch includes various standalone improvements:
> 
>      *  Patch 6: Centralizes the XSAVE disablement message
> 
>      *  Patches 7-8: Simplifies PKRU update in XSTATE_BV on sigframe
> 
>      *  Patch 9: Removes the unused mxcsr_feature_mask export
> 
>      *  Patch 10: Renames fpu_reset_fpregs() for clarity
> 
>      Each patch includes context and links to earlier discussions or
>      revisions.

>  14 files changed, 69 insertions(+), 26 deletions(-)

Applied to tip:x86/fpu, thanks!

Note that I've merged the currently pending tip:x86/cpu bits into 
tip:x86/fpu before applying these patches, to resolve a conflict with 
<asm/cpufeatures.h>, and re-formatted the new X86_FEATURE_APX line to 
have the canonical format.


	Ingo