These couple of changes bring the System Timer Module - STM which is
part of the NXP S32 architecture.
The timer module has one counter and four comparators, an interrupt
line when one of the comparator matches the counter. That means the
interrupt is shared across the comparator.
The number of STM is equal to the number of core available on the
system. For the s32g2 variant, there are three Cortex-M3 and four
Cortex-A53, consequently there are seven STM modules dedicated to
those.
In addition, there is a STM variant which is read-only, so the counter
can not be set because it is tied to another STM module dedicated to
timestamp. These special STM modules are apart and will be handled
differently as they can not be used as a clockevent. They are not part
of these changes.
The choice is to have one STM instance, aka one STM description in the
device tree, which initialize a clocksource and a clockevent per
CPU. The latter is assigned to a CPU given the order of their
description. First is CPU0, second is CPU1, etc ...
Changelog:
- v5
- Fixed typos in the comments (Ghennadi Procopciuc)
- Added clocks bindings for the module and the register (Ghennadi Procopciuc)
- Fixed help in the Kconfig option (Ghennadi Procopciuc)
- Changed max_ticks to ULONG_MAX when registering the clockevent
- Removed Reviewed-by tag from Krzysztof Kozlowski as the binding changed
Daniel Lezcano (2):
dt-bindings: timer: Add NXP System Timer Module
clocksource/drivers/nxp-timer: Add the System Timer Module for the
s32gx platforms
.../bindings/timer/nxp,s32g2-stm.yaml | 64 +++
drivers/clocksource/Kconfig | 8 +
drivers/clocksource/Makefile | 2 +
drivers/clocksource/timer-nxp-stm.c | 495 ++++++++++++++++++
4 files changed, 569 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/nxp,s32g2-stm.yaml
create mode 100644 drivers/clocksource/timer-nxp-stm.c