[PATCH v3 0/2] Fix PLL lock timeout and calibration wait time

From: Devarsh Thakkar
Date: Thu May 01 2025 - 23:35:43 EST


This fixes PLL lockup and O_CMN_READY timeout by moving the polling
function after common state machine gets enabled. Also fix the
calibration wait time to optimize the polling time.

Changelog:
V3:
- Use read-modify-write for using calibrated value for PLL
lock time
- Move out PLL clock configuration part to power_on function

V2: Separate patch for calibration logic and
return error code on polling

Previous versions:
V2: https://lore.kernel.org/all/20250326152320.3835249-1-devarsht@xxxxxx/
V1: https://lore.kernel.org/all/20241230125319.941372-1-devarsht@xxxxxx/

Test logs:
Link: https://gist.github.com/devarsht/89e4830e886774fcd50aa6e29cce3a79

Rangediff:
V2->V3:
https://gist.github.com/devarsht/c4d2c4f6715ec7aa4df4cb2c7991b7aa

Devarsh Thakkar (2):
phy: cadence: cdns-dphy: Fix PLL lock and O_CMN_READY polling
phy: cadence: cdns-dphy: Update calibration wait time for startup
state machine

drivers/phy/cadence/cdns-dphy.c | 111 +++++++++++++++++++++++++-------
1 file changed, 87 insertions(+), 24 deletions(-)

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2.39.1